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An eagerly anticipated, up-to-date guide to essential digital design fundamentals
Offering a modern, updated approach to digital design, this much-needed book reviews basic design fundamentals before diving into specific details of design optimization. You begin with an examination of the low-levels of design, noting a clear distinction between design and gate-level minimization. The author then progresses to the key uses of digital design today, and how it is used to build high-performance alternatives to software.
-Offers a... MORE
-Progresses though low levels of design, making a clear distinction between design and gate-level minimization
-Addresses the various uses of digital design today
-Enables you to gain a clearer understanding of applying digital design to your life
With this book by your side, you'll gain a better understanding of how to apply the material in the book to real-world scenarios.
| Preface | |
| To Students About To Study Digital Design | |
| To Instructors of Digital Design | |
| How to Use This Book | |
| RTL-Focused Approach | |
| Traditional Approach with Some Reordering | |
| Traditional Approach | |
| Acknowledgements | |
| About the Cover | |
| About the Author | |
| Reviewers and Evaluators | ... MORE |
| Introduction | |
| Digital Systems in the World Around Us | |
| The World of Digital Systems | |
| Implementing Digital Systems: Microprocessors versus Digital Circuits | |
| About this Book | |
| Exercises | |
| Combinational Logic Design | |
| Introduction | |
| Switches | |
| The CMOS Transistor | |
| Boolean Logic Gates Building Blocks for Digital Circuits | |
| Boolean Algebra | |
| Representations of Boolean Functions | |
| Combinational Logic Design Process | |
| More Gates | |
| Decoders and Muxes | |
| Additional Considerations | |
| Combinational Logic Optimizations and Tradeoffs (See Section 6.2) | |
| Combinational Logic Description Using Hardware Description Languages (See Section 9.2) | |
| Chapter Summary | |
| Exercises | |
| Sequential Logic Design: Controllers | |
| Introduction | |
| Storing One Bit Flip-Flops | |
| Finite-State Machines (FSMs) | |
| Controller Design | |
| More on Flip-Flops and Controllers | |
| Sequential Logic Optimizations and Tradeoffs (See Section 6.3) | |
| Sequential Logic Description Using | |
| Product Profile Pacemaker | |
| Chapter Summary | |
| Exercises | |
| Datapath Components | |
| Introduction | |
| Registers | |
| Adders | |
| Comparators | |
| Multiplier Array-Style | |
| Subtractors and Signed Numbers | |
| Arithmetic-Logic Units ALUs | |
| Shifters | |
| Counters and Timers | |
| Register Files | |
| Datapath Component Tradeoffs (See Section 6.4) | |
| Datapath Component Description Using Hardware Description Languages (See Section 9.4) | |
| Product Profile: An Ultrasound Machine | |
| Chapter Summary | |
| Exercises | |
| Register-Transfer Level (RTL) Design | |
| Introduction | |
| High-Level State Machines | |
| RTL Design Process | |
| More RTL Design | |
| Determining Clock Frequency | |
| Behavioral-Level Design: C to Gates (Optional) | |
| Memory Components | |
| Queues (FIFOs) | |
| Multiple Processors | |
| Hierarchy A Key Design Concept | |
| RTL Design Optimizations and Tradeoffs (See Section 6.5) | |
| RTL Design Using Hardware Description Languages (See Section 9.5) | |
| Product Profile: Cell Phone | |
| Chapter Summary | |
| Exercises | |
| Optimizations and Tradeoffs | |
| Introduction | |
| Combinational Logic Optimizations and Tradeoffs | |
| Sequential Logic Optimizations and Tradeoffs | |
| Datapath Component Tradeoffs | |
| RTL Design Optimizations and Tradeoffs | |
| More on Optimizations and Tradeoffs | |
| Product Profile: Digital Video Player/Recorder | |
| Chapter Summary | |
| Exercises | |
| Physical Implementation on ICs | |
| Introduction | |
| Manufactured IC Types | |
| Full-Custom Integrated Circuits Semicustom (Application-Specific) Integrated Circuits ASICs | |
| Off-the-Shelf Programmable IC Type FPGA | |
| Other Off-the-Shelf IC Types | |
| IC Tradeoffs, Trends, and Comparisons | |
| Product Profile: Giant LED-Based Video | |
| Chapter Summary | |
| Exercises | |
| Programmable Processors | |
| Introduction | |
| Basic Architecture | |
| A Three-Instruction Programmable Processor | |
| A Six-Instruction Programmable Processor | |
| Extending the Instruction Set | |
| Extending the Control Unit and Datapath | |
| Example Assembly and Machine Programs | |
| Further Extensions to the Programmable Processor | |
| Chapter Summary | |
| Exercises | |
| Hardware Description Languages | |
| Introduction | |
| Combinational Logic Description Using Hardware Description Languages | |
| Sequential Logic Description Using Hardware Description Languages | |
| Datapath Component Description | |
| RTL Design Using Hardware Description Languages | |
| Chapter Summary | |
| Exercises | |
| Boolean Algebras | |
| Boolean Algebra | |
| Switching Algebra | |
| Important Theorems in Boolean Algebra | |
| Other Examples of Boolean Algebras | |
| Further Readings | |
| Additional Topics in Binary Number Systems | |
| Introduction | |
| Real Number Representation | |
| Fixed Point Arithmetic | |
| Floating Point Representation The IEEE 754-1985 Standard | |
| B.5 Exercises | |
| Extended RTL Design Example | |
| Introduction | |
| Designing the Soda Dispenser Controller | |
| Understanding the Behavior of the Soda Dispenser Controller and Datapath | |
| Table of Contents provided by Publisher. All Rights Reserved. |