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Electronic Devices and Circuit Theory

ISBN: 9780137692828 | 013769282X
Format: Hardcover
Publisher: Prentice Hall
Pub. Date: 9/1/1998

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SummaryTable of Contents
Boylestad/Nashelsky uses a "building block" approach that ensures students learn the basic concepts before moving on to more advanced topics.
PREFACExiii(9)
ACKNOWLEDGMENTSxvii
1 SEMICONDUCTOR DIODES
1(50)
1.1 Introduction
... MORE(1)
1.2 Ideal Diode
1(2)
1.3 Semiconductor Materials
3(3)
1.4 Energy Levels
6(1)
1.5 Extrinsic Materials--n-and p-Type
7(3)
1.6 Semiconductor Diode
10(7)
1.7 Resistance Levels
17(7)
1.8 Diode Equivalent Circuits
24(3)
1.9 Diode Specification Sheets
27(4)
1.10 Transition and Diffusion Capacitance
31(1)
1.11 Reverse Recovery Time
32(1)
1.12 Semiconductor Diode Notation
32(1)
1.13 Diode Testing
33(2)
1.14 Zener Diodes
35(3)
1.15 Light-Emitting Diodes (LEDs)
38(4)
1.16 Diode Arrays--Integrated Circuits
42(1)
1.17 PSpice Windows
43(8)
2 DIODE APPLICATIONS
51(61)
2.1 Introduction
51(1)
2.2 Load-Line Analysis
52(5)
2.3 Diode Approximations
57(2)
2.4 Series Diode Configurations with DC Inputs
59(5)
2.5 Parallel and Series-Parallel Configurations
64(3)
2.6 AND/OR Gates
67(2)
2.7 Sinusoidal Inputs: Half-Wave Rectification
69(3)
2.8 Full-Wave Rectification
72(4)
2.9 Clippers
76(7)
2.10 Clampers
83(4)
2.11 Zener Diodes
87(7)
2.12 Voltage-Multiplier Circuits
94(3)
2.13 PSpice Windows
97(15)
3 BIPOLAR JUNCTION TRANSISTORS
112(31)
3.1 Introduction
112(1)
3.2 Transistor Construction
113(1)
3.3 Transistor Operation
113(2)
3.4 Common-Base Configuration
115(4)
3.5 Transistor Amplifying Action
119(1)
3.6 Common-Emitter Configuration
120(7)
3.7 Common-Collector Configuration
127(1)
3.8 Limits of Operation
128(2)
3.9 Transistor Specification Sheet
130(4)
3.10 Transistor Testing
134(2)
3.11 Transistor Casting and Terminal Identification
136(2)
3.12 PSpice Windows
138(5)
4 DC BIASING--BJTS
143(68)
4.1 Introduction
143(1)
4.2 Operating Point
144(2)
4.3 Fixed-Bias Circuit
146(7)
4.4 Emitter-Stabilized Bias Circuit
153(4)
4.5 Voltage-Divider Bias
157(8)
4.6 DC Bias with Voltage Feedback
165(3)
4.7 Miscellaneous Bias Configurations
168(6)
4.8 Design Operations
174(6)
4.9 Transistor Switching Networks
180(5)
4.10 Troubleshooting Techniques
185(3)
4.11 PNP Transistors
188(2)
4.12 Bias Stabilization
190(9)
4.13 PSpice Windows
199(12)
5 FIELD-EFFECT TRANSISTORS
211(42)
5.1 Introduction
211(1)
5.2 Construction and Characteristics of JFETs
212(7)
5.3 Transfer Characteristics
219(4)
5.4 Specification Sheets (JFETs)
223(3)
5.5 Instrumentation
226(1)
5.6 Important Relationships
227(1)
5.7 Depletion-Type MOSFET
228(6)
5.8 Enhancement-Type MOSFET
234(8)
5.9 MOSFET Handling
242(1)
5.10 VMOS
243(1)
5.11 CMOS
244(2)
5.12 Summary Table
246(1)
5.13 PSpice Windows
247(6)
6 FET BIASING
253(52)
6.1 Introduction
253(1)
6.2 Fixed-Bias Configuration
254(4)
6.3 Self-Bias Configuration
258(6)
6.4 Voltage-Divider Biasing
264(6)
6.5 Depletion-Type MOSFETs
270(4)
6.6 Enhancement-Type MOSFETs
274(6)
6.7 Summary Table
280(2)
6.8 Combination Networks
282(3)
6.9 Design
285(2)
6.10 Troubleshooting
287(1)
6.11 P-Channel FETs
288(3)
6.12 Universal JFET Bias Curve
291(3)
6.13 PSpice Windows
294(11)
7 BJT TRANSISTOR MODELING
305(33)
7.1 Introduction
305(1)
7.2 Amplification in the AC Domain
305(1)
7.3 BJT Transistor Modeling
306(2)
7.4 The Important Parameters: Zi, Zo, Av, Ai
308(6)
7.5 The r(e) Transistor Model
314(7)
7.6 The Hybrid Equivalent Model
321(6)
7.7 Graphical Determination of the h-parameters
327(4)
7.8 Variations of Transistor Parameters
331(7)
8 BJT SMALL-SIGNAL ANALYSIS
338(63)
8.1 Introduction
338(1)
8.2 Common-Emitter Fixed-Bias Configuration
338(4)
8.3 Voltage-Divider Bias
342(3)
8.4 CE Emitter-Bias Configuration
345(7)
8.5 Emitter-Follower Configuration
352(6)
8.6 Common-Base Configuration
358(2)
8.7 Collector Feedback Configuration
360(6)
8.8 Collector DC Feedback Configuration
366(3)
8.9 Approximate Hybrid Equivalent Circuit
369(6)
8.10 Complete Hybride Equivalent Model
375(7)
8.11 Summary Table
382(1)
8.12 Troubleshooting
382(3)
8.13 PSpice Windows
385(16)
9 FET SMALL-SIGNAL ANALYSIS
401(51)
9.1 Introduction
401(1)
9.2 FET Small-Signal Model
402(8)
9.3 JFET Fixed-Bias Configuration
410(2)
9.4 JFET Self-Bias Configuration
412(6)
9.5 JFET Voltage-Divider Configuration
418(1)
9.6 JFET Source-Follower (Common-Drain) Configuration
419(3)
9.7 JFET Common-Gate Configuration
422(4)
9.8 Depletion-Type MOSFETs
426(2)
9.9 Enhancement-Type MOSFETs
428(1)
9.10 E-MOSFET Drain-Feedback Configuration
429(3)
9.11 E-MOSFET Voltage-Divider Configuration
432(1)
9.12 Designing FET Amplifier Networks
433(3)
9.13 Summary Table
436(3)
9.14 Troubleshooting
439(1)
9.15 PSpice Windows
439(13)
10 SYSTEMS APPROACH-EFFECTS OF R(s) AND R(L)
452(41)
10.1 Introduction
452(1)
10.2 Two-Port Systems
452(2)
10.3 Effect of a Load Impedance (R(L))
454(5)
10.4 Effect of a Sources Impedance (R(s))
459(2)
10.5 Combined Effect of R(s) and R(L)
461(2)
10.6 BJT CE Networks
463(5)
10.7 BJT Emitter-Follower Networks
468(3)
10.8 BJT CB Networks
471(2)
10.9 FET Networks
473(3)
10.10 Summary Table
476(4)
10.11 Cascaded Systems
480(1)
10.12 PSpice Windows
481(12)
11 BJT AND JFET FREQUENCY RESPONSE
493(51)
11.1 Introduction
493(1)
11.2 Logarithms
493(4)
11.3 Decibels
497(3)
11.4 General Frequency Considerations
500(3)
11.5 Low-Frequency Analysis--Bode Plot
503(5)
11.6 Low-Frequency Response--BJT Amplifier
508(8)
11.7 Low-Frequency Response--FET Amplifier
516(4)
11.8 Miller Effect Capacitance
520(3)
11.9 High-Frequency Response--BJT Amplifier
523(7)
11.10 High-Frequency Response--FET Amplifier
530(4)
11.11 Multistage Frequency Effects
534(2)
11.12 Square-Wave Testing
536(2)
11.13 PSpice Windows
538(6)
12 COMPOUND CONFIGURATIONS
544(44)
12.1 Introduction
544(1)
12.2 Cascade Connection
544(5)
12.3 Cascode Connection
549(1)
12.4 Darlington Connection
550(5)
12.5 Feedback Pair
555(4)
12.6 CMOS Circuit
559(2)
12.7 Current Source Circuit
561(2)
12.8 Current Mirror Circuit
563(3)
12.9 Differential Amplifier Circuit
566(8)
12.10 BIFET, BIMOS, AND CMOS Differential Amplifier Circuits
574(1)
12.11 PSpice Windows
575(13)
13 DISCRETE AND IC MANUFACTURING TECHNIQUES
588(21)
13.1 Introduction
588(1)
13.2 Semiconductor Materials, Si, Ge, and GaAs
588(2)
13.3 Discrete Diodes
590(2)
13.4 Transistor Fabrication
592(1)
13.5 Integrated Circuits
593(2)
13.6 Monolithic Integrated Circuit
595(2)
13.7 The Production Cycle
597(10)
13.8 Thin-Film and Thick-Film Integrated Circuits
607(1)
13.9 Hybrid Integrated Circuits
608(1)
14 OPERATIONAL AMPLIFIERS
609(39)
14.1 Introduction
609(2)
14.2 Differential and Common-Mode Operation
611(4)
14.3 Op-Amp Basics
615(4)
14.4 Practical Op-Amp Circuits
619(6)
14.5 Op-Amp Specifications -- DC Offset Parameters
625(3)
14.6 Op-Amp Specifications -- Frequency Parameters
628(4)
14.7 Op-Amp Unit Specifications
632(6)
14.8 PSpice Windows
638(10)
15 OP-AMP APPLICATIONS
648(31)
15.1 Constant-Gain Multiplier
648(4)
15.2 Voltage Summing
652(3)
15.3 Voltage Buffer
655(1)
15.4 Controller Sources
656(2)
15.5 Instrumentation Circuits
658(4)
15.6 Active Filters
662(4)
15.7 PSpice Windows
666(13)
16 POWER AMPLIFIERS
679(42)
16.1 Introduction -- Definitions and Amplifier Types
679(2)
16.2 Series-Fed Class A Amplifier
681(5)
16.3 Transformer-Coupled Class A Amplifier
686(7)
16.4 Class B Amplifier Operation
693(4)
16.5 Class B Amplifier Circuits
697(7)
16.6 Amplifier Distortion
704(4)
16.7 Power Transistor Heat Sinking
708(4)
16.8 Class C and Class D Amplifiers
712(2)
16.9 PSpice Windows
714(7)
17 LINEAR-DIGITAL ICs
721(30)
17.1 Introduction
721(1)
17.2 Comparator Unit Operation
721(7)
17.3 Digital-Analog Converters
728(4)
17.4 Timer IC Unit Operation
732(3)
17.5 Voltage-Controlled Oscillator
735(3)
17.6 Phase-Locked Loop
738(4)
17.7 Interfacing Circuitry
742(3)
17.8 PSpice Windows
745(6)
18 FEEDBACK AND OSCILLATOR CIRCUITS
751(32)
18.1 Feedback Concepts
751(1)
18.2 Feedback Connection Types
752(6)
18.3 Practical Feedback Circuits
758(7)
18.4 Feedback Amplifier -- Phase and Frequency Considerations
765(2)
18.5 Oscillator Operations
767(2)
18.6 Phase-Shift Oscillator
769(3)
18.7 Wien Bridge Oscillator CIrcuit
772(1)
18.8 Tuned Oscillator Circuit
773(3)
18.9 Crystal Oscillator
776(4)
18.10 Unijunction Oscillator
780(3)
19 POWER SUPPLIES (VOLTAGE REGULATORS)
783(27)
19.1 Introduction
783(1)
19.2 General Filter Considerations
783(3)
19.3 Capacitor Filter
786(3)
19.4 RC Filter
789(3)
19.5 Discrete Transistor Voltage Regulation
792(7)
19.6 IC Voltage Regulators
799(5)
19.7 PSpice Windows
804(6)
20 OTHER TWO-TERMINAL DEVICES
810(32)
20.1 Introduction
810(1)
20.2 Schottky Barrier (Hot-Carrier) Diodes
810(4)
20.3 Varactor (Varicap) Diodes
814(4)
20.4 Power Diodes
818(1)
20.5 Tunnel Diodes
819(5)
20.6 Photodiodes
824(3)
20.7 Photoconductive Cells
827(2)
20.8 IR Emitters
829(2)
20.9 Liquid-Crystal Displays
831(2)
20.10 Solar Cells
833(4)
20.11 Thermistors
837(5)
21 pnpn AND OTHER DEVICES
842(42)
21.1 Introduction
842(1)
21.2 Silicon-Controlled Rectifier
842(1)
21.3 Basic Silicon-Controlled Rectifier Operation
842(3)
21.4 SCR Characteristics and Ratings
845(2)
21.5 SCR Construction and Terminal Identification
847(1)
21.6 SCR Applications
848(4)
21.7 Silicon-Controlled Switch
852(2)
21.8 Gate Turn-Off Switch
854(1)
21.9 Light-Activated SCR
855(3)
21.10 Shockley Diode
858(1)
21.11 DIAC
858(2)
21.12 TRIAC
860(1)
21.13 Unijunction Transistor
861(10)
21.14 Phototransistors
871(2)
21.15 Opto-Isolators
873(2)
21.16 Programmable Unijunction Transistor
875(9)
22 OSCILLOSCOPE AND OTHER MEASURING INSTRUMENTS
884(18)
22.1 Introduction
884(1)
22.2 Cathode Ray Tube -- Theory and Construction
884(1)
22.3 Cathode Ray Oscilloscope Operation
885(1)
22.4 Voltage Sweep Operation
886(3)
22.5 Synchronization and Triggering
889(4)
22.6 Multitrace Operation
893(1)
22.7 Measurement Using Calibrated CRO Scales
893(5)
22.8 Special CRO Features
898(1)
22.9 Signal Generators
899(3)
APPENDIX A: HYBRID PARAMETERS -- CONVERSION EQUATIONS (EXACT AND APPROXIMATE)902(2)
APPENDIX B: RIPPLE FACTOR AND VOLTAGE CALCULATIONS904(7)
APPENDIX C: CHARTS AND TABLES911(2)
APPENDIX D: SOLUTIONS TO SELECTED ODD-NUMBERED PROBLEMS913(6)
INDEX919

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